One issue that FETs fabricated in an SOI substrate may experience is a floating body effect. In such FETs, floating body effects are a result of having a body region that is electrically isolated from a bulk substrate. In order to supply a voltage potential to the body, and therefore mitigate floating body effects, an applied bias is often supplied from a body-contact to the body. When the body-contact receives an applied bias, which may be a ground or a positive or negative potential, it carries it to the body via a body tie. Often times, the body-tie is formed in device layer silicon and runs beneath an oxide.
In general, the body-tie allows the body region and the body-contact to be in remote locations in an SOI substrate. Unfortunately, however, the body-tie may be exposed to a variety of processing steps during the fabrication of a FET. Implant steps, for example, may cause ions to penetrate the oxide layer and alter a body-tie's conductive properties. To prevent such exposure, an SOI based process flow may need to include additional process steps to accommodate a body tie. In the example above, an additional photo-resist mask may be needed to prevent implantation into the body-tie. This and other types of accommodation increase process complexity and decrease yield.